| E. Volkerink, Verigy |
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| S. Davidson, Oracle |
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| D. Armstrong, Advantest |
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| B. Brown, LTX-Credence |
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| A. Khoche, Khoche Consulting Services |
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| R. Kapur, Synopsys |
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| Y. Ma, Advantest |
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| A. Gold, Advantest |
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| F.-F. Ferhani, Broadcom |
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| D. Acharyya, Verigy |
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| R. Barth, Micron |
| P. Burlison, Verigy |
| K.-Y. Cho, NVIDIA |
| C. J. Clark, Intellitech |
| A. Evans, Broadcom |
| W. Fister, Micron |
| G. Fleeman, Advantest |
| B. Gage, Teradyne |
| M. Hafed, DFT Microsystems |
| R. Kapur, Synopsys |
| D. Keezer, GeorgiaTech |
| K. Lanier, Teradyne |
| R. Lesnikoski, Oracle |
| M. Loranger, FormFactor |
| Y. Ma, Advantest |
| J. Moreira, Verigy |
| P. Muhmenthaler, MUHMY Systems |
| J. Plusquellic, University of New Mexico |
| B. Price, NXP |
| M. Roos, Roos Instruments |
| J. Rivoir, Verigy |
| S. Tilden, LTX-Credence |
| C.W. Wu, Tsing Hua University |
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"ATEVision is the 'go to' forum for design and test professionals committed to staying up-to-date on technology trends and strategy."
Debbora Ahlgren, OptimalTest
Trip Report
ATEVision 2010 Pictures
ATEVision Interview in T&M World
Scope: As in years past, this workshop will examine where the ATE industry is heading in the near and long-term. Moore's law continues to move forward with denser, large, faster, and highly heterogeneous devices coming our way. Further complications to this situation are the challenges associated with multiple cores on a die and the 3D trends enabled by die-stacking and thru-silicon-vias.
These issues, when added to ever increasing Test complexity, Cost-of-Test and Time-to-Market pressures pose a significant challenge to the ATE industry. To meet these challenges the industry (ATE developers and End-Users together) need to innovate in areas such as: shared interconnect technology, streamlined test program generation methods, better integrated Design-for-Testability tools.
The goal of this workshop is to create an informal forum to discuss those innovations relevant to ATE developers and users. We are looking for solutions and ideas for solutions to the issues we will run into in the 2012/2013 timeframe. What do we need to do differently? What will an ATE need to look like in 2015 and 2020? Are our present technologies adequate for the future and if not what should we be doing to close the gap?
This workshop is unique. We're not necessarily looking for a standard paper filled with results; we are looking for speculation and creative brainstorming ideas. Let's challenge ourselves and each other.
Representative topics include, but are not limited to:
- Critical "future-proof" ATE capabilities
- Test methods for future defects
- 3D device testing ideas and techniques
- Power testing needs for Green technology
- Protocol Aware Techniques
- High-speed IO Test
- Ensuring test quality while minimizing test cost
- RF and SOC testing trends
- Adaptive & concurrent testing challenges
- Test program generation ideas
- Ways to streamline our test efforts
- Killer ATE Products Ideas
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Register Now 
